Address transition detection circuits (ADT) are employed in both dynamic random access memory (DRAM) circuits and in static random access memory (SRAM) circuits to detect and indicate the presence of stable address input signals. The detection of an address transition is used to trigger internal memory operations. In prior art circuits there is a problem in detecting address transitions when the address input signal is at a DC level which is close to the switching threshold of the detection circuit. Thus false address detection indications may be given, or in some cases the presence of an address may not be detected.
In addition, in prior art ATD circuits serially connected slow delay inverters are used. A short address input pulse may trigger the input circuits of the address transition detector, but it may not propagate through the circuit due to filtering action caused by the slow inverters. This can result in an ATD output pulse which indicates the presence of a stable address input signal which is shorter than required by the memory.